With the use of the simplistic equivalent circuits, loss mechanism in conventional power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) gate drive circuits is analyzed. Resonant gate drive techniques are investigated and a new resonant gate drive circuit is presented. The presented circuit adds minor complexity to conventional gate drivers but reduces the MOSFET gate drive loss very effectively. To further expand its use in driving Half-Bridge MOSFETs, another circuit is proposed in this thesis. The later circuit simplifies the isolation circuitry for the top MOSFET and meanwhile consumes much lower power than conventional gate drivers.

What is a power-MOSFET gate driver? It is a power amplifier that accepts a low-power input from a controller IC and produces the appropriate high-current gate drive for a power MOSFET. A gate driver is used when a pulse-width-modulation (PWM) controller cannot provide the output current required to drive the gate capacitance of the associated MOSFET. Gate drivers may be implemented as dedicated ICs, discrete transistors, or transformers. They can also be integrated within a controller IC. Partitioning the gate-drive function off the PWM controller allows the controller to run cooler and be more stable by eliminating the high peak currents and heat dissipation needed to drive a power MOSFET at very high frequencies. What's the circuit model for a gate driver and power MOSFET?

Figure 1 shows the simplified model, including the parasitic components that influence high-speed switching, gate-to-source capacitance (CGS), the gate-to-drain capacitance (CGD), and drain-to-source capacitance (CDS). Hamming Code Program. Values of the source inductance (LS) and drain inductance (LD) depend on the MOSFET's package. The other parasitic component is RG, the resistance associated with the gate signal distribution within the MOSFET that affects switching times. What are the primary gate-driver design considerations? An important attribute for the gate driver is its ability to provide sufficient drive current to quickly pass through the Miller Plateau Region of the power-MOSFET's switching transition. This interval occurs when the transistor is being driven on or off, and the voltage across its gate-to-drain parasitic capacitor (CGD) is being charged or discharged by the gate driver.